This invention relates generally to the retrieval of data recorded on magnetic media and deals more particularly with improved circuitry for processing electrical signals generated by a read head.
The recording of data on magnetic media such as disks and tapes is normally carried out by entering the encoded data as a continuous track of magnetization having polarity reversals at intervals determined by the data that is being recorded and by the rules of the particular encoding and recording processes that are employed. In current disk and tape systems, the recorded data are recovered by sensing polarity reversals, i.e., the presence, absence and relative position of each change in polarity. It is only the polarity changes that are important, not the polarity itself. The polarity reversals are commonly referred to as flux transitions and are detected by using an inductive read head. When the magnetized track of data is moved past the sensitive gap of the read head, current is induced to flow and the read head thus generates a small voltage pulse each time an area of flux transition passes through the read head gap.
The pulses which are thereby generated are amplified and converted by read channel circuitry into a binary signal suitable for use by data processing equipment. The read channel circuitry must be capable of performing this conversion in spite of numerous signal distortions and corruptions that can occur during both normal and abnormal operation of the equipment. Included among the problems that are often encountered is the loss of signal amplitude which can occur for a variety of reasons. In order to make the read channel circuit immune to amplitude loss, two general approaches have been taken. One is to use automatic gain control and the other involves designing the read channel circuit in a manner to be intrinsically insensitive to the amplitude of the signal. The need for automatic gain control adds to the cost and complexity of the circuitry, while amplitude insensitive circuits have problems of their own, as will be discussed more fully.
Many read channel systems in current use have basically the same architecture, although the specific implementations vary rather widely. The read channel circuitry typically includes one or more gain stages, a lowpass filter for attenuating unwanted frequencies, a differentiator for differentiating the signal, and a zero crossing detector. The circuit is arranged to detect the voltage peaks in the read channel's signal which correspond to flux transitions, and its performance is best at high flux densities, but has a serious shortcoming at the low flux densities of a given system. Whether the polarity is positive or negative is not important, and the amplitudes of the pulses are also ignored. The function of the differentiator is to convert the peaks, both positive and negative, to zero crossings, and the zero crossing detector is normally implemented with a conventional comparator which detects zero crossings of the differentiated signal.
In order to make efficient use of the recording space on the magnetic media, self clocking codes are usually used because they avoid the need for separate clock information to be recorded on a separate track or other separate portion of the medium. These self-clocking codes include FM, MFM, GCR and RLL code schemes. In the self-clocking codes, data and clock information are mixed together and recorded on the same track. Mixing of data and clock information together increases the flux density on the medium but not unduly if the self clocking code is well designed. FM code was used in the past but has now been supplanted by MFM code which is more efficient and perhaps the most widely used code at present. A newer class of codes referred to as RLL (run length limited) codes have recently evolved and exhibit efficiency improvement over MFM. At the same time, the characteristics of the RLL codes are especially compatible with web-coated magnetic recording media and with state of the art electronic components.
The efficiency gains of the RLL codes are achieved in part by broadening the bandwidth that is required to process the RLL signal in the read channel. The bandwidth is commonly expressed as the ratio of the highest frequency or flux-densities to the lowest frequency or flux-densities of the fundamental signals, and it has a significant impact on the read channel circuitry design. An unfortunate shortcoming of the differentiator circuit when used as a peak detector is that it is most accurate on the highest flux densities and less accurate on the lower densities used in any given system. MFM has a relatively narrow bandwidth of 2:1, and this gives the differentiator little trouble. However, the greater 2.67:1 bandwidth of RLL noticeably worsens the performance of the differentiator, and the GCR bandwidth of 3:1 makes it worse yet. The reason for the problem is the "saddle" shape that the differentiated signal acquires as the spread between the lowest and highest frequencies increases and the flux-transitions are spread farther apart in time. The middle or "notch" of the "saddle" shaped signal can approach or even cross zero, especially when noise is considered, and it can then be interpreted as a flux transition when in fact it is not. The problem of spurious zero crossings in the signal is most acute with the more efficient codes such as RLL.
Although at least two popular approaches have been taken to solving this problem, neither has been wholly successful and both incur a substantial increase in circuit complexity. One approach involves implementing two parallel filters for filtering of the signal. One filter is used as a high resolution filter which attenuates only the high frequency noise with little effect on the desired signal. The other filter is a low resolution filter which attenuates the portion of the signal at the high end of the signal's band width. The low resolution filter reduces the depth of the notch in each "saddle" portion of the differentiated signal by reducing the amplitude of the high frequency component which is superimposed on a low frequency component to create the "saddle" shape. The high resolution signal retains the system resolution and timing accuracy and is applied as a digitized clock signal to a type D flip flop which also receives the low resolution signal as its data input. The spurious peaks which are eliminated from the low resolution signal are in this manner ignored by the flip flop even though present in the high resolution clock signal. The overall result is that advantage is taken of the high resolution signal for timing purposes while the benefit of low resolution discrimination against false peaks is achieved at the same time.
Despite these advantages, the dual filter approach does not provide a wholly successful solution to the false peak problem. The need for two separate filters adds significantly to the cost of the circuitry, particularly since the filters typically employ relatively expensive inductors. The added components of the second filter also take up valuable space on the circuit board of the system. Perhaps even more importantly, the different frequency responses and resolution capabilities of the two filters makes them unavoidably mismatched in their phase response characteristics, and this often results in significant degradation of the performance of the system. The signal timing is dependent on the propagation delays of the two filters, among other things, and the propogation delay can vary substantially depending on the data involved and other variables. As a consequence, the dual filter system is subject to pattern sensitivity which detracts from its ability to give consistent results under the operating conditions it can be expected to encounter. This situation is tolerable for systems such as MFM which have narrow handwidth but is accelerated by wide-band width codes, such as RLL and GCR for which the technique usually becomes unworkable.
The second approach that has been taken to overcome the false peak problem takes advantage of the fact that the instantaneous amplitude of a true (i.e., not "false") peak, prior to differentiation, is always well above or well below zero, whereas the amplitude of a "false" peak is usually at or near zero. This approach typically involves using a pair of amplitude comparators to detect the amplitude of the undifferentiated signal and logic gating which ignores false peaks by rejecting zero crossings in the differentiated signal that occur at the same time that the undifferentiated signal has an amplitude below the threshold of the comparators.
This type of system is plagued by added cost and circuit complexity resulting from the need for the amplitude comparators and related components. Even more significantly, the system is amplitude sensitive and the whole system will fail if the amplitude drops below the comparator threshold for some reason. Therefore, accurate control of the signal amplitude is crucial, and it is usually necessary to include automatic gain control or similar circuitry in order for the system to operate successfully. The need for additional components to control the amplitude adds to the cost, complexity and space requirements of the read channel circuit. Even with automatic gain control, the system is not infallible.